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Evaluation Board, 1:6 Low Jitter Universal Clock Buffer, 2:1 Input MUX


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Technical Datasheet:
SI53301/4-EVB   Datasheet
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Product Overview

The SI53301/4-EVB is an Evaluation Board used for evaluation of the Si533xx family of low-jitter clock buffers/level translators. As shipped from the factory, this evaluation board has the Si53301 device installed. The entire Si533xx family of buffers uses the same input circuits and output drivers and all have the same jitter specifications. Thus, this board can be used to evaluate any Si533xx device. The Si53301 provides pin-selectable clock output signal format, drive strength control, optional clock division and per-bank output enable. The Si53304 provides pin-selectable clock output signal format, drive strength control and individual output enable pins for each clock output.
  • Power supply connections for VDD, VDDOA and VDDOB, GND
  • Jumpers for selection of output signal format, output enable, input clock select and output divider
  • Jumpers to allow self-biasing of CMOS single-ended inputs
  • SMA connectors for easy access to test and evaluate the Si53301


Test & Measurement, Industrial

Product Information

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Silicon Laboratories

SI53301, SI53304

Clock & Timing

Clock Buffer & Level Translator

Eval Board SI53301, SI53304


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Technical Documents (2)

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